It is known to use time division multiplexing on a control bus or network to increase the number of control devices which may be attached to that bus. Multiplexing increases the given number of unique I/O addresses (time slots) of the control bus by adding one or more multiplexed channels, each channel having a unique address and a number of I/O addresses. The I/O addresses of each multiplex channel are the same. Data is sent over the control bus in frames, each of which includes a particular one of the multiplex channel addresses followed by data for each of the I/O devices on that particular multiplex channel. The unique multiplex channel address ensures that only one multiplex channel can be accessed by the bus controller at a time. Since the I/O addresses on each multiplex channel are the same, each I/O device must have a decoding circuit which can decode both the multiplex channel addresses and the I/O address. This prevents an I/O device on one multiplex channel from receiving data directed to an I/O device on another multiplex channel. Output devices have an additional multiplexing problem since they require a refresh signal during each data frame. Since each data frame is addressed to a different multiplex channel address, the output devices connected to one multiplex channel will not receive their next refresh signal until all of the other multiplex channels on the control bus have received one data frame. Therefore, some means must be provided for each output device to receive a refresh signal during each data frame, regardless of the multiplex channel to which it is addressed. The extra circuitry required for decoding multiplex channel addresses and accessing refresh signals increases the cost and circuit board space requirements for each I/O device. These cost and space increases may not be as significant in the larger and more expensive analog device modules, but it can be significant in the smaller and less expensive discrete I/O device modules. Therefore, it would be desirable to have a device which could extend multiplexing capabilities to a number of down line modules, either analog or discrete I/O devices, without requiring that each module have its own multiplex channel decoder and refresh circuitry. Niobrara R&D Corporation of Joplin, Miss., has developed a device which permits the installation of discrete input devices on a time division multiplexed control bus. However, their device will not permit discrete output devices to be installed on a time division multiplexed control bus. Some control bus systems also require a "heartbeat" pulse to indicate whether or not a bus fault has occurred or whether the main (up-line) data line has failed to change states from HIGH to LOW or LOW to HIGH in the last data frame. The heartbeat pulse must be received by each I/O device during each data frame, regardless of the multiplex channel to which the frame is addressed. It is therefore required that the multiplex extending device also include circuitry for passing the heartbeat pulse to all I/O device on the control bus during each data frame. A heartbeat type control bus system is described in U.S. Pat. Nos. 4,808,994; 5,553,070 and 5,631,854 issued to Riley and U.S. Pat. No. 5,555,267 issued to Burke Jr., et al. all of which are incorporated herein by reference.